**FET Datasheet Specifications:**

**Maximum Ratings –** A portion of a FET Datasheet Specifications is reproduced in Fig. 9-17. As with other device data sheets, a device type number and brief description is usually given at the start. Maximum ratings follow, and then the electrical characteristics are stated for specific bias conditions. From Fig. 9-17, the maximum drain-source voltage (V_{DS}) for the 2N5457 through 2N5459 devices is 25 V, and the maximum drain-gate voltage (V_{DG}) is also 25 V. This means, for example, that if a -5 V gate-source bias is used, the drain source voltage should not exceed,

Note on Fig. 9-17 that the maximum reverse gate-source voltage (V_{G(r)}) is specified as 25 V. This is considerably greater than the (typically 5 V) maximum base-emitter reverse voltage for a BJT.

No maximum drain current is specified in Fig. 9-17, but this can be calculated from the maximum power dissipation and the V_{DS} level. The specified gate current (I_{G}) is the maximum gate current if the gate-channel junctions become forward biased.

**Saturation Current and ****Pinch off voltage**:

**Pinch off voltage**:

The drain-source saturation current (I_{DSS}) and the pinch-off voltage (V_{P }or V_{GS(off)}) have already been discussed. Values for these are listed in the FET Datasheet Specifications portion showing the Off Characteristics and ON Characteristics in Fig. 9-18. It is seen that V_{GS(off)} for a 2N5457 (underlined) ranges from a minimum of 0.5 V to a maximum of 6 V. Also, the I_{DSS }level for a 2N5457 (dashed underline) is a minimum of 1 mA and a maximum of 5 mA.

The FET transfer characteristic approximately follows the equation,

When I_{DSS} and V_{P} are known, a table of corresponding values of I_{D} and V_{GS} can be determined from Eq. 9-1. These may be used to construct the FET transfer characteristic. Because of the wide range of specified values for I_{DSS }and V_{P}, the transfer characteristic can differ substantially from one device to another one having the same type number. This creates a problem in FET bias circuits.

**Forward Transfer Admittance:**

The forward transfer admittance (Y_{fs}) [also known as the transconductance (g_{m} or g_{FS})] for a FET defines how the drain current is controlled by the gate-source voltage.

The units used for Y_{fs} are microSiemens (μS), which can be restated as microamps per volt (μA/V). MilliSiemens (mS), or milliamps/volt (mA/V) might also be used. For a FET with Y_{js} = 2 mA/V. I_{D} changes by 2 mA when V_{GS} is altered by 1 V. In the portion of a FET Datasheet Specifications in Fig. 9-20, the Y_{fs} units are μmhos. The mho (ohm written backwards) is another (older) name for the Siemen, the unit of conductance. For the 2N5457 (underlined) the value of Y_{fS} is specified as a minimum of 1000 μmhos, and a maximum of 5000 μmhos. An inverted ohm symbol is also sometimes used instead of the Siemens symbol.

Because Y_{fs} defines the relationship between I_{D} and V_{GS}, it can be determined from the slope of the FET transfer characteristic. This is illustrated in Fig. 9-21.

The transfer characteristic for a FET Datasheet Specifications is defined by Eq. 9-1, and Y_{fs} is determined from the slope of the transfer characteristic. So, an equation for Y_{fs} can be derived by differentiating Eq. 9-1.

Equation 9-3 may be used to calculate the value of Y_{fs} for any V_{GS} level. As in Eq. 9-1, the negative sign for V_{GS} is already included, so that only the numerical value should be entered.

**Output Admittance:**

The drain resistance (r_{d}) of a FET is the ac resistance between drain and source terminals when the device is operating in the pinch-off region of its drain characteristics. it is also the slope of the drain characteristics in the pinch-off region; (see Fig. 9-22). The drain characteristics are almost flat, so, r_{d} is not easily determined from the characteristic. Because r_{d} is usually the output resistance of the FET at the drain terminal, it may also be expressed as an output admittance (Y_{os} = 1/r_{d}).

The output admittance is defined as,

**Drain-Source ON Resistance:**

The drain-source ON resistance (r_{DS(on)}) (also designated R_{D(on)}), is a dc quantity, not to be confused with the ac drain-source resistance (r_{ds}). r_{DS(on) }is the resistance of the FET channel when the depletion regions are absent; when the device is biased ON in the channel ohmic region of the drain characteristics. (see Fig. 9-23). In this condition, the voltage drop along the channel from drain to source is I_{D} x r_{DS(on)}). This is the drain-source ON voltage (V_{DS(on)}). which is similar to the V_{CE(sat)} of a BJT.

The drain-source ON resistance might typically be 60 Ω or lower. It can be an important quantity for FETs used in switching circuits. V_{DS(on)} can be much smaller than V_{CE(sat)} making FET gates superior to BJT gates for some applications.

**Gate Cutoff Current and Input Resistance:**

The gate-channel junctions in a JFET are pn-junctions, and because they are normally reverse biased, a minority charge carrier current flows. This is the gate-source cutoff current (I_{GSS}), or gate reverse current. [see Fig. 9-24(a)). For a 2N5457 FET. I_{GSS} is specified as 1 nA at 25°C, and 200 nA at 100°C.

The gate input resistance (R_{GS}) is the resistance of the reverse-biased gate-channel junctions [Fig. 9-24(b)], and it is inversely proportional to I_{GSS}. Typical values of R_{GS} for a JFET are 10^{9} Ω at 25°C and 10^{7} Ω at 100°C.

**Breakdown Voltage:**

The are several ways used for expressing JFET breakdown voltage. BV_{DGO} is the **drain-gate breakdown voltage** with the source terminal open-circuited. BV_{GSS} is the **gate-source breakdown voltage** with the drain terminal shorted to the source. Both are a specification of the voltage at which the gate-channel junctions might break down.

**Noise Figure:**

A FET usually has a much lower level of thermal noise than a BJT. This is because there are very few charge carriers crossing junctions in a FET. As in the case of a BJT, the FET noise figure (NF) is specified as a spot noise figure at a particular frequency and bias conditions, and for a given resistance at the input. The figure varies if any of these conditions are altered. Noise calculations for a FET circuit are performed exactly as for a BJT circuit.

**Capacitances:**

Terminal capacitances for FETs may be specified as gate-drain capacitance (C_{gd}). gate-source capacitance (C_{gs}), and drain-source capacitance (C_{ds}). The input capacitance is sometimes expressed as the common-source input capacitance (C_{iss} or C_{gss}). This is the gate-source capacitance measured with the drain terminal shorted to the source, (Fig. 9-25). In this case, a reverse transfer capacitance (C_{rss}) is also specified: C_{rss} being another term for C_{gd}. These quantities are very important for FET high-frequency and switching circuits.