**FET Common Source Amplifier with Unbypassed Source Resistors:**

Equivalent Circuit – When an unbypassed source resistor (R_{S}) is present in a FET Common Source Amplifier circuit, as shown in Fig.11-10(a), it also appears in the ac equivalent circuit, [Fig. 11-10(b)].

In the complete equivalent circuit R_{S} must be shown connected between the FET source terminal and the circuit common input-output terminal, (Fig. 11-11). As with the previous equivalent circuit, the current directions and voltage polarities shown in Fig. 11-11 are those that occur when the instantaneous input voltage is positive-going. The presence of R_{S} without a bypass capacitor significantly affects the circuit voltage gain.

**Input Impedance:**

An equation for the input impedance at the FET gate can be determined from v_{i} and I_{g}. From Fig. 11-11,

Equation 11-8 gives the input impedance at the FET gate terminal. The circuit input impedance is again given by,

In this case, Z_{g} is much larger than R_{1}||R_{2}, so the circuit input impedance is determined by the gate bias resistors.

**Output Impedance:**

To calculate the circuit output impedance, the ac signal voltage (v_{s}) is assumed to be zero, and an ac voltage (v_{o}) is applied at the output, (see Fig. 11-12(a)]. The ac output current (I_{d}) is calculated in terms of v_{o}, then Z_{o} is determined as v_{o} divided by I_{d}. Figure 11-12(a) shows that when v_{s} is zero, the ac voltage across source resistor R_{S} is applied as a gate-source voltage

Actually, I_{d}R_{S} is divided across r_{s}||R_{G} and R_{gs}. However, R_{gs} ≫r_{s} || R_{G}, so that all of I_{d}R_{S} is effectively applied as a gate-source voltage. The v_{gs }produced in this way generates an ac drain current which opposes the drain current produced by v_{o},

Converting the current generator [(Y_{fs}v_{gs}) in parallel with r_{d}] to a voltage generator [(Y_{fs}v_{gs}r_{d}) in series with r_{d}] gives the equivalent circuit in Fig. 11-12(b). The equation for the voltage drops around this circuit is,

The circuit output Impedance is,

Because the output impedance at the FET drain terminal is much larger than the drain resistor (R_{D}), the output impedance of the circuit with the unbypassed source resistor is still,

**Voltage Gain:**

From the derivation of the input impedance equation,

and neglecting r_{d},

Usually,

The voltage gain of a FET Common Source Amplifier circuit with an unbypassed source resistor can be quickly estimated using Eq. 11-11. For the circuit in Fig. 11-10(a), with R_{D} = 4.7 kΩ, R_{S} = 2.2 kΩ, and R_{L} ≫ R_{D}, A_{v} ≈ -2.1.

**Summary of Performance of CS Circuit with Unbypassed R**_{S}

_{S}

The most significant feature of the performance of a CS circuit with an unbypassed source resistor is that its voltage gain is much lower than that for a CS circuit with R_{S} bypassed.