**Universal Transfer Characteristics for FET:**

A Universal Transfer Characteristics for FET is simply a transfer characteristic plotted with I_{DSS} = 1 and V_{P} = 1. Then, instead of the scales being calibrated in milliamps and volts, they are marked as the ratios I_{D}/I_{DSS} and V_{GS}/V_{P}. To construct the Universal Transfer Characteristics for FET, Eq. 9-1 is rewritten,

Now, by substituting convenient values for V_{GS}/V_{P} into Eq. 10-18 corresponding values of I_{D}/I_{DSS} are calculated, and these are used to plot the characteristic shown in Fig. 10-45.

The Universal Transfer Characteristics for FET can be applied to analyze or design a circuit using virtually any JFET. This saves the necessity of plotting the transfer characteristics for each device. The specified values of I_{Dss} and V_{p} must be known for the device. Then, the characteristic is used in the same way as an actual transfer characteristic, except that V_{GS} levels must be converted to V_{GS}/V_{P} ratios, and I_{D} levels must be converted to I_{D}/I_{DSS} before they can be plotted on the graph. Similarly, readings taken from the graph are converted back to V_{GS} and I_{D }levels by multiplying them by V_{p} and I_{Dss} respectively.

**Circuit Analysis:**

Consider the gate bias circuit analyzed in already, and reproduced in Fig. 10-46. The gate voltage is given as -2.3 V, and the device used has I_{DSS(max)} = 8 mA and V_{P(max)} = -6 V. The bias line is drawn vertically on the Universal Transfer Characteristics for FET at,

The gate bias line drawn (at V_{GS}/V_{p} = 0.38) on Fig. 10-45 intersects the universal characteristic at the point where I_{D}/I_{DSS} = 0.375,

This is the I_{D(max) }level.

The minimum I_{D} for a gate bias circuit can be determined from the Universal Transfer Characteristics for FET, by using the I_{DSS(min) }and V_{P(min)} values. Bias lines can also be drawn for analysis of self bias circuits and voltage divider bias circuits.