**Voltage Doubler Circuit:**

A Voltage Doubler Circuit produces an output voltage which is approximately double the peak voltage of the input waveform. Consideration of the voltage doubler circuit diagram in Fig. 3-42 shows that it is simply a combination of two diode-capacitor clamping circuits without the discharge resistors. In fact, the circuit operation is similar to that of clamping circuits.

When the input voltage is negative, as shown in Fig. 3-43(a), diode D_{1} is forward biased, and C_{1} charges to (E – V_{F1}) with the polarity illustrated. D_{2} is reverse biased during the negative half-cycle of the input, so the charge on C_{2} Is not affected at this time.

Figure 3-43(b) shows what occurs during the input positive half-cycle. D_{1} is now reverse biased, and D_{2} is forward biased. The voltage applied to D_{2} and C_{2} is the sum of the input voltage and the voltage on C_{1}. So, as illustrated, capacitor C_{2} is charged to,

It is seen that, when the diode voltage drop is much smaller than the input voltage, the output is approximately double the peak input amplitude. The polarity of the output voltage can be reversed by reversing the polarity of the diodes and capacitors.

The output terminals of the Voltage Doubler Circuit are the terminals of capacitor C_{2}. The load current partially discharges the capacitors, producing an output voltage drop in the same way that tilt is created on a clamping circuit output. The repeated charge and discharge of C_{1} and C_{2} results in a ripple waveform on the output.

A sinusoidal input waveform to a Voltage Doubler Circuit produces exactly the same type of output ripple that occurs with a half-wave rectifier, [Fig. 3-44(a)]. However, the input most often used is a dc voltage source which has been chopped, or converted into a square waveform, [Fig. 3-44(b)].

Capacitor C_{2} supplies the load current (I_{L}) while diode D_{2} is reverse biased, [Fig. 3-45(a)]. The discharge of C_{2} accounts for half the output ripple voltage amplitude, and the discharge of C_{1} produces the other half of the ripple amplitude. Equation 3-43 can be modified for calculating the capacitance of C_{2}.

While D_{2} is forward biased [Fig. 3-45(b)], capacitor C_{1} supplies I_{L} and the recharging current to C_{2}. The recharging current must equal I_{L} to maintain the full charge on C_{2}, so C_{1} supplies 2I_{L}. Applying Eq. 3-43 to calculate C_{1}, it is found that,

**Four Stage DC Voltage Multiplier Circuit:**

A Four Stage DC Voltage Multiplier Circuit is shown in Fig. 3-47. Comparing to the voltage doubler in Fig. 3-42, it is seen that this circuit consists of two cascade-connected voltage doubling circuits. To simplify the explanation of the circuit operation, assume ideal diodes with V_{F} = 0.

**When V**_{i}= -E; D_{1}is forward biased, and C_{1}charges via D_{1}to E.**When V**_{i}= +E; point A is at +2E, D_{1}is reverse biased, D_{2}is forward biased, C_{2}charges via D_{2}to 2E.**When V**_{i}= -E; point A is close to ground level, point B is at 2E (because of V_{C2}), D_{2}is reverse biased, D_{3}is forward biased, and C_{3 }charges via D_{3}to 2E volts.**When V**_{i}= +E; point A is at +2E, point B is at +2E, and point C is at +4E, D_{4}is forward biased, and C_{4}charges via D_{4}to 2E volts.

The resulting output voltage, taken across C_{2} and C_{4} is 4E volts, as illustrated. Additional stages may be added to the circuit to produce higher levels of dc output voltage. Figure 3-48 shows another way that do DC Voltage Multiplier Circuit diagrams are often drawn. Examination of the circuit shows that it is exactly the same as Fig. 3-47.