**Two Stage CE Amplifier using Series Voltage Negative Feedback:**

**Negative Feedback Amplifier Circuit –** A two-stage, capacitor-coupled BJT amplifier is shown in Fig. 13-10. This is the same Two Stage CE Amplifier circuit discussed already with the addition of feedback components R_{F2}, R_{F1}, and C_{F1}. The output voltage is divided across R_{F2 }and R_{F1} to produce a feedback voltage in series with the signal at the base of Q_{1}.

C_{F1} (in Fig. 13-10) is a dc blocking capacitor to prevent the dc voltage at Q_{2} collector from affecting the Q_{1} bias conditions. C_{F1} behaves as an open-circuit to do and a short-circuit to ac. Consequently, C_{F1} is not included in the mid-frequency no equivalent circuit of the feedback network in Fig. 13-11. Capacitor C_{2} behaves as a short-circuit at middle and higher frequencies, so C_{2} and R_{4} (shorted by C_{2}) are also absent from the mid-frequency no equivalent circuit.

The signal voltage (v_{s}) is applied between Q_{1} base and ground, as illustrated in Fig. 13-11, and the output voltage (v_{o}) is developed between Q_{2} collector and ground. The feedback voltage (v_{f}) is developed across resistor R_{F2}, between the Q_{1} emitter terminal and ground. The input voltage (v_{i}) appears across the Q_{1} base-emitter terminals as the difference between v_{s} and v_{f}.

From previous topics of a Two Stage CE Amplifier, it is known that the circuit output voltage is in phase with the signal voltage. When the instantaneous level of v_{s} is positive-going, v_{o} is also positive-going, and consequently v_{f} is in phase-opposition with v_{s}. When v_{s} goes up (positively), v_{f} also goes up, and consequently, the voltage (v_{i}) at the base-emitter of Q_{1 }is reduced from v_{s} to,

Note that the Q_{1} bias resistors (R_{1} and R_{2}) in Fig. 13-10 are outside the feedback loop, and are unaffected by feedback. The impedance looking-into the transistor base is within the feedback loop, so it is altered by feedback. Also, recall that the Q_{2} collector resistor (R_{7}) is unaffected by negative feedback, and that the impedance looking-into the transistor collector terminal is changed by negative feedback.

The feedback factor for the circuit in Figs. 13-10 and 13-11 is,

From Eq. 13-3,

Usually R_{F1 }≫ R_{F2}, so

**Negative Feedback Amplifier Design:**

A Two Stage CE Amplifier using Series Voltage Negative Feedback amplifier like the one shown in Fig. 13-12, is best designed first as an amplifier without feedback. The feedback component values are then determined, and the circuit is modified as necessary.

Like R_{L}, R_{F1} is an additional load at the collector of the second stage in Fig. 13-12. As illustrated in Fig. 13-13, the voltage gain of the second stage is proportional to the total load (R_{L}||R_{7}||R_{F1}), consequently, R_{F1} has the effect of reducing the second stage gain. A large open-loop gain is required for good gain stability, so R_{F1} should be selected as large as possible.

Resistor R_{F2} is an unbypassed resistor in series with the emitter of Q_{1}. As such, it would seem to reduce the first stage voltage gain, and thus reduce the circuit open-loop gain. However, because v_{f} is applied to Q_{1} emitter, the effective open-loop gain is the voltage gain from the BE terminals of Q_{1} to the collector of Q_{2}. So, R_{F2} does not alter the overall open-loop gain. (R_{F2} is omitted when calculating the circuit open-loop gain.)

Another consideration for R_{F2} is that it is in parallel with the impedance (Z_{e1}) at the emitter of Q_{1}, (see Fig. 13-14). Without negative feedback, Z_{e1} would usually equal the transistor h_{ib}, value, which is typically 26 Ω when I_{C} = 1 mA. With negative feedback, Z_{e1} can be shown to range from about 2.5 kΩ to 30 kΩ depending upon A_{v} and B. Resistor R_{F2} should be selected much smaller than Z_{e1}. However, R_{F2} should be as large as possible to give the largest possible value for R_{F1}; (from Eq. 13-10, R_{F1} ≈ A_{CL} X R_{F2}).

A reasonable starting point for feedback network design is to select R_{F2} much lower than Z_{e1}/10: in the range of 100 Ω to 470 Ω. R_{F2} could also alter the dc bias conditions for Q_{1}. Consequently, it might be necessary to reduce R_{4}, so that R_{4} and R_{F2} add up to the original resistance selected for R_{4} (or R_{E}), (see Fig. 13-14).

Figure 13-15 shows a low-frequency ac equivalent circuit for the feedback network. Note that capacitor C_{F1} is still taken as an ac short circuit, so X_{CF1} is assumed to be very much smaller than R_{F1}. The impedance of capacitor C_{2 }is show, and because X_{C2} is assumed to be very much smaller than resistor R_{4}, R_{4} is omitted.

From Fig. 13-15, v_{o} is divided across R_{F1} and (R_{F2} + jX_{C2}) to give v_{f}, so the feedback factor is,

Assuming that (R_{F2} – jX_{C2}) ≪ R_{F1},

When X_{C2} = R_{F2},

To set a desired frequency lower cutoff frequency (f_{1}),

As already mentioned, X_{CF1} must be very much smaller than R_{F1} at the low cutoff frequency for the amplifier. It can be shown that, if X_{CF1} = R_{F1} at f_{1}, the closed-loop gain would actually increase at frequencies below f_{1}. C_{F1} is normally calculated from,

Capacitor C_{F1 }can often be eliminated. If R_{F1} is large enough, direct connection of R_{F1} from Q_{2C} to Q_{1E} in Fig. 13-12 will have a negligible effect on the circuit bias conditions. In fact, with a direct-coupled circuit, direct connection of the feedback resistors might enhance the circuit bias stability.

The circuit input impedance is increased by negative feedback, so input coupling capacitor C_{1} can be recalculated as a smaller capacitor, (X_{C1} = Z_{in}/10 at f_{1}). Recall that the bias resistors are not affected by feedback. Regardless of how high the circuit input impedance might become, C_{1} should normally be selected as a minimum of 0.1 μF, to ensure that it is much larger than any stray capacitance at the circuit input.

The emitter bypass capacitor C_{4} (in Fig. 13-12) was calculated to have X_{C4 }= 0.65 h_{ib2 } at f_{1}. So, X_{C4} will reduce the circuit open-loop gain (A_{v}) at f_{1}. However, even with this gain reduction. A_{v} should still be much larger than A_{CL}, so C_{4} can normally be left as calculated for an amplifier without feedback.

Recall from earlier discussion that, when designing an amplifier without feedback, the collector resistor (R_{C2}) for the output transistor is usually selected as equal to, or less than, R_{L}/10. This is because without negative feedback Z_{o} ≈ R_{C2}. Negative feedback normally reduces Z_{o} to a value much smaller than R_{C2}. So, R_{C2} does not have to be selected as R_{L}/10 when designing a Two Stage CE Amplifier using Series Voltage Negative Feedback. Instead, any convenient level of V_{RC} and I_{C} can be used for calculating a suitable R_{C2} value.