**Two Stage Differential Amplifier with Negative Feedback:**

The circuit shown in Fig. 13-20 has a Two Stage Differential Amplifier with Negative Feedback with npn BJTs, and a direct-coupled pnp transistor differential amplifier second stage. The circuit uses a plus/minus supply voltage, and the base terminals of Q_{1} and Q_{2} are biased to ground via resistors R_{1} and R_{6}, respectively. Transistors Q_{3} and Q_{4} have the bases directly connected to the collector terminals of Q_{1} and Q_{2}. So, bias voltage for Q_{3} and Q_{4} bases is provided by the voltage drops across the Q_{1}Â and Q_{2} collector resistors, (R_{2} and R_{4}).

The amplifier input terminal is the base of Q_{1}, and the output is taken from Q_{3} collector. No collector resistor is provided for Q_{4}, because no output or feedback is taken from Q_{4}. Note that the feedback network (R_{5} and R_{6}) is connected from the output at the collector of Q_{3Â }back to the base of Q_{2}. Because the emitter of Q_{2} is directly coupled to Q_{1Â }emitter, applying the feedback voltage (v_{f}) to Q_{2Â }base is similar to applying it to Q_{1} emitter.

**DC Bias Conditions:**

The circuit in Fig. 13-20 is designed to have the do bias voltage at Q_{2} base equal to Q_{1} base bias voltage; in this case, ground level. This means that the do voltage at the collector of Q_{3} must also equal the Q_{1} base voltage, because Q_{3} collector is directly connected to Q_{2} base via R_{5}. Consider what would happen if V_{C3} (at the output terminal ) is not exactly equal to V_{B1} (at the input).

Suppose V_{C3}Â goes lower than its normal level:

**V**_{B2}is reduced below the level of V_{B1},Â and this reduces I_{C2}Â and increases I_{C1}.**The increased level of I**_{C1}Â causes an increased voltage drop across R_{2}, and the reduced level of I_{C2}Â decreases theÂ voltage drop across R_{4}. Thus V_{B3}is increased and V_{B4}is decreased.**This raises the level of I**_{C3}Â and lowers I_{C4}. So, V_{RB}is increased (by the I_{C3}Â increase) to drive V_{C3}Â back up to its normal voltage. Similarly, if V_{C3}Â somehow drifts to a higher than normal level:**V**_{B2}is raised above the level of V_{B1}, thus increasing I_{C2}and reducing I_{C1}.**The decreased level of I**_{C1}Â and increased level of I_{C2}Â produces voltage drops across R_{2}and R_{4}that reduce V_{B3}and increase V_{B4}.**This change reduces I**_{C3}, thus decreasing V_{RB}Â to drive V_{C3}Â back down to its normal voltage.

It is seen that there is do negative feedback that stabilizes the circuit bias conditions.

**AC Operation:**

Consider the circuit waveforms shown in Fig. 13-21. A positive-going input signal (v_{i}) at the base of Q_{1} produces a positive-going output (v_{o}) at Q_{3} collector. As in the case of the dc biasÂ conditions, the instantaneous ac voltage at Q_{2} base follows the instantaneous level of the ac signal voltage at Q_{1} base.

With v_{b2Â }= v_{b1}, or v_{i}Â = v_{f},

Resistors R_{5} and R_{6} in Figs. 13-20 and 13-21 are comparable to R_{F1} and R_{F2}, respectively, in the other negative feedback circuits already discussed. So, the closed-loop gain equation is the same equation that applies in the case of all series-voltage negative feedback amplifiers. As always, the equation is true only when the open-loop gain is very much larger than the closed-loop gain.

The input and output impedances for a circuit with a Two Stage Differential Amplifier with Negative Feedback are calculated exactly as discussed for other negative feedback circuits.

Note that there are no bypass capacitors in the circuit in Figs. 13-20 and 13-21. If the signal and load are capacitor coupled to the circuit, the coupling capacitors determine the lower cutoff frequency. If the signal and load are direct coupled, then the circuit is a dc amplifier; one that amplifies direct voltage signals.

**Circuit Design:**

The second stage components are determined in essentially the same way as the input stage components, bearing in mind that the second stage is upside down compared to the input stage. Feedback network resistor R_{6} at the base of Q_{2} is selected equal to bias resistor R_{1} at Q_{1} base. This is to equalize the resistances at the bases of Q_{1} and Q_{2}, and thus equalize any voltage drops due to I_{B1}Â and I_{B2}.Â R_{5} is calculated from the specified closed loop gain and the R_{6} resistance.

**Modification for Reduced Z**_{out}:

_{out}:

Although the application of series-voltage negative feedback substantially reduces the output impedance of a circuit, further reduction of Z_{out} is sometimes required. Figure 13-23 shows the circuit of Fig. 13-22 with the addition of an emitter follower output stage (Q_{5}). Note that the feedback network is now connected at the emitter follower output terminal.

The output impedance at Q_{5} emitter terminal in Fig. 13-23 is found from the common-collector circuit

This gives,

This quantity is modified by negative feedback

Then, as always, the circuit output impedance which must also be rewritten for the circuit in Fig. 13-23.

An emitter follower output stage can be added to any of the amplifiers previously discussed. However, the combination of an emitter follower output stage with a differential amplifier has a particular significance.