Power Supply Source Effect in Semiconductor:
Power Supply Source Effect in Semiconductor shows that the ac supply to the input of a transformer in a dc power supply does not always remain constant. A ±10% variation in the ac source voltage (VS) (also termed the line voltage) is not unusual.
When the source voltage varies, there is some variation in the dc output voltage from a power supply, (see Fig. 3-18). This output voltage change (ΔEo) due to a change in the input is termed the source effect.
If the output varies by 100 mV when the source voltage changes by ±10%, the source effect is 100 mV.
An alternative way of stating this output change is to express ΔEo as a percentage of the dc output voltage (Eo). In this case, the term line regulation is used.
Power supply output voltage is also affected by changes in load current (IL). The output voltage decreases when IL is increased, and rises when IL is reduced.
The load effect defines how the output voltage changes when the load current is increased from zero to its specified maximum level (IL(max)). If the load current change (ΔIL) produces a voltage change (ΔEo) of 100 mV, the load effect is 100 mV.
As for the source effect, the load effect can also be expressed as a percentage of the output voltage. This is termed the load regulation.