Gate Bias Circuit

Gate Bias Circuit: Circuit Operation - Consider the Gate Bias Circuit shown in Fig. 10-6. The FET gate terminal is connected via resistor RG to a bias voltage VG. If…

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Emitter Bias Circuit Diagram

Emitter Bias Circuit Diagram: This Emitter Bias Circuit Diagram is obtained by simply introducing an emitter resistor to the fixed bias circuit as shown in Fig. 12.9. For analysis, we…

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Performance of CMOS Gates

Performance of CMOS Gates: The Performance of CMOS Gates which based on following different categories namely, Operating Speed : Slower than TTL series. Approximately 25 to 100 ns depending on…

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FET Biasing Articles

FET Biasing Articles: Basic JFET Biasing Circuits Comparison : The Basic JFET Biasing Circuits Comparison (gate bias, self-bias, and voltage divider bias) are similar in performance to the three basic…

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Biasing Bipolar Op Amp Circuit

Biasing Bipolar Op Amp Circuit: Biasing Bipolar Op Amp Circuit - Like other electronic devices, operational amplifiers must be correctly biased if they are to function properly. As already discussed,…

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Common Gate Circuit

Common Gate Circuit: The FET Common Gate Circuit (CG) shown in Fig. 11-19 uses voltage divider bias. The ac output is taken from the drain terminal, and an external load…

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