Category: MOTOROLA 68000

68000 Stack and Queue

68000 Stack and Queue: 68000 Stack and Queue – 68000 supports stack and queue data structures with the address register indirect position direct and predecrement addressing modes. A stack operates on the principle of Last In First Out (LIFO) and, queue operates on the principle of First In First Out (FIFO). When data is added […]

Exceptions Types of Motorola 68000

Exceptions Types of Motorola 68000: Exception means an interrupt processing. Like 8086, Exceptions Types of Motorola 68000 also uses a jump vector table to transfer program control to the appropriate handler program, whenever an exception occurs. Operating Modes of 68000: Exceptions Types of Motorola 68000 can be operated in User or Supervisory mode. When 68000 is […]

Instruction Set of 68000 Microprocessor

Instruction Set of 68000 Microprocessor: There are actually 56 basic instructions provided in the Instruction Set of 68000 Microprocessor. With 14 addressing modes, 56 instructions, and 5 data types, the 68000 includes more than 1000 opcodes. The basic format of all the instructions is same. The opcode for every instruction is one word. Additional extension […]

Addressing Modes of 68000

Addressing Modes of 68000: 68000 utilizes 14 different Addressing Modes of 68000 which can be grouped into 6 basic types. These are 1.Direct Register Addressing a)Data Register Direct b)Address Register Direct 2.Direct Memory Addressing a)Absolute short b)Absolute long. 3.Indirect Memory Addressing a)Register Indirect b)Post-increment Register Indirect c)Pre-decrement Register Indirect d)Register Indirect with Displacement e)Register Indirect […]

Motorola 68000 Pins and Signals

Motorola 68000 Pins and Signals: Fig. 11.3 illustrates the Motorola 68000 Pins and Signals. Data Transfer Control and Address Lines: D0-D15 is the bi-directional 16-bit data bus. A1-A23 is the output 24-bit address bus. The UDS (Upper Data Strobe) and LDS (Lower Data Strobe) signals determine whether data is being transferred on either the upper (most […]

Register Architecture of 68000 Microprocessor

Register Architecture of 68000 Microprocessor: Fig. 11.1 illustrate the Register Architecture of 68000 Microprocessor. Data Registers: The data registers can be used to handle (8-bit) bytes, (16-bit) words, or 32-bit long words. When a data register is used as a source or destination operand, only the appropriate low-order portion of the Register Architecture of 68000 […]