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Addressing Modes of 80186:

The 80186 provides eight different types of addressing modes to specify operands. The operand (data) is used in the instruction to specify the addressing modes. The addressing mode byte is always the second byte of the instruction code. Usually, the two addressing modes of 80186 are provided for instructions that operate on the register or immediate operands:

Register Operand Addressing Mode The operand is located in one of the 8- or I6-bit general registers. The examples of 8-hit and 16-bit registers addressing arc MOV AL, BL and MOV AX, BP respectively.

Immediate Operand Addressing Mode The operand is included in the instruction. The examples of immediate operand mode are MOV AL, FFH and MOV BX, 2354H.

The remaining six modes are provided to specify the location of an operand in a memory segment. Any memory operand address consists of a segment base and an offset. The segment base must be supplied by a 16-bit segment register. The offset is called the effective address, and it is determined by summing any com­bination of the following three address elements as given below:

  • the 8- or 16-bit immediate displacement provided in the instruction
  • the contents of base registers such as BX or BP base registers
  • the contents of index registers such as SI or DI index registers

The combinations of the above three address elements define the six memory addressing modes as given below.

Direct Addressing Mode The operand’s offset is contained in the instruction as an 8- or 16-bit displacement element. The example of direct addressing mode instruction is MOV AX, [3000].

Register Indirect Addressing Mode In this addressing mode, the operand’s offset is stored in one of the registers SI, DI, BX, or BP. The example of register indirect addressing mode instruction is MOV AX, [BX].

Based Addressing Mode The operand’s offset is the sum of an 8- or 16-bit displacement and the contents of a base register (BX or BP). The example of based addressing mode instruction is MOV AX, [BX+66].

Indexed Addressing Mode In this addressing mode, the operand’s offset is the sum of an 8-bit or 16-bit displacement and the contents of an index register (SI or DI). The example of indexed addressing mode instruction is MOV AX, [SI + 0300].

Based Indexed Addressing Mode The operand’s offset is the sum of the contents of a base register and an index register. The example of based indexed addressing mode instruction is MOV AX, [BX+SI].

Based Indexed Mode with Displacement Addressing Mode In this addressing mode the operand’s offset is the sum of a base register’s contents, an index register’s contents, and an 8- or 16-hit displacement. The example of based indexed with displacement addressing mode instruction is MOV AX, [BX+SI+0200].