Category: 8085 ARCHITECTURE

8085 Machine Cycle

8085 Machine Cycle: The seven 8085 Machine Cycle are : Opcode Fetch Memory Read Memory Write I/O Read I/O Write Interrupt Acknowledge Bus Idle 1.Opcode Fetch Cycle : The first machine cycle of every instruction is opcode fetch cycle in which the 8085 finds the nature of the instruction to be executed. In this machine […]

Instruction Cycle

Relation between Instruction Cycle, Machine Cycle and T-State: During normal operation, the microprocessor sequentially fetches, decodes and executes one instruction after another until a halt instruction (HLT) is executed. The fetching, decoding and execution of a single instruction constitutes an instruction cycle, which consists of one to five read or write operations between processor and […]

8085 Microprocessor Pin Diagram

8085 Microprocessor Pin Diagram: Fig. 1.3 (a) and (b) shows 8085 pin configuration and functional 8085 Microprocessor Pin Diagram respectively. The signals of 8085 can be classified into seven groups according to their functions. Power supply and frequency signals. Data bus and address bus Control bus Interrupt signals Serial I/O signals DMA signals Reset signals […]

8085 Microprocessor Architecture

8085 Microprocessor Architecture: Fig. 1.1 shows the 8085 Microprocessor Architecture. It consists of various functional blocks as listed below : Registers Arithmetic and Logic Unit Instruction decoder and machine cycle encoder Address buffer Address/Data buffer Incrementer/Decrementer Address Latch Interrupt control Serial I/O control Timing and control circuitry. Registers It has eight addressable 8-bit registers : […]