Parallel Adder and Subtractor: Parallel Adder and Subtractor which consists of three categories, namely, n Bit Parallel Adder,Binary Parallel Adder and n Bit Parallel Subtractor. n Bit Parallel Adder: We have seen, a single full-adder is capable of adding two one-bit numbers and an input carry. In order to add binary numbers with more […]

### Category: Digital Integrated Circuits

## Half Subtractor and Full Subtractor Circuit

Half Subtractor and Full Subtractor Circuit: Subtractor are divided into two categories namely, half subtractor and full subtractor circuit. Half Subtractor Circuit: The Half Subtractor Circuit consists of four possible elementary operations, namely, In all operations, each subtrahend bit is subtracted from the minuend bit. In case of second operation the minuend bit is smaller […]

## Half Adder and Full Adder Circuit

Half Adder and Full Adder Circuit: Adders are divided into two categories namely, half adder and full adder circuit. Half Adder Circuit: The Half Adder Circuit operation needs two binary inputs : augend and addend bits; and two binary outputs : sum and carry. The half adder truth table shown in 3.6 gives the relation […]

## Programmable Array Logic

Programmable Array Logic: We have seen that PLA device with a Programmable AND array and Programmable OR array. However, Programmable Array Logic programmable logic device with a fixed OR array and a programmable AND array. Because only AND gates are programmable , the PAL is easier to program, but is not as flexible as the PLA. Fig.3.106 […]

## Block Diagram of Programmable Logic Array

Block Diagram of Programmable Logic Array: Block Diagram of Programmable Logic Array is the combinational circuit do not use all the minterms every time. Occasionally, they have don’t care conditions. Don’t care condition when implemented with a ROM becomes an address input that will never occur. The result is that not all the bit patterns […]

## Read Only Memory

Read Only Memory (ROM): A Read Only Memory (ROM) is a device that includes both the decoder and the OR gates within a single IC package. The Fig. 3.82 shows the block diagram of ROM. It consists of n input lines and m output lines. Each bit combination of the input variables is called an […]

## Array Structures

Design of Array Structures: We have seen the design of digital circuits using fixed function ICs. There are two more approaches for the Design of Array Structures. Use of application specific integrated circuits (ASICs) Use of programmable logic devices (PLDs) In the fixed function IC approach, we have to use various fixed function ICs to […]

## Dynamic RAM

Dynamic RAM: Dynamic RAM stores the data as a charge on the capacitor. Fig.3.77 shows the dynamic RAM cell. A dynamic RAM contains thousands of such memory cells. When COLUMN (Sence) and ROW (Control) lines go high, the MOSFET conducts and charges the capacitor. When the COLUMN and ROW lines go low, the MOSFET opens […]

## RAM Architecture

Ram Architecture: Ram Architecture – Unlike ROM, we can read from or write into the RAM, so it is often called read/write memory. The numerical and character data that are to be processed by the computer change frequently. These data must be stored in type of memory from which they can be read by the […]

## Flash Memory

Flash Memory: Flash memory (sometimes called “flash RAM”) is a type of constantly-powered nonvolatile memory that can be erased and reprogrammed in units of memory called blocks. It is a variation of electrically erasable programmable read-only memory (EEPROM) which, unlike flash memory, is erased and rewritten at the byte level, which is slower than flash […]