Address Decoding Techniques in 8086 Microprocessor

Address Decoding Techniques in 8086 Microprocessor:

The Different types of Address Decoding Techniques in 8086 Microprocessor are,

  1. Absolute decoding

  2. Linear decoding

  3. Block decoding

1. Absolute Decoding :

In absolute decoding technique the memory chip is selected only for the specified logic level on the address lines; no other logic levels can select the chip. Fig 10.12 shows the memory interface. with absolute decoding. Two 8K EPROMs (2764) are used to provide even and odd memory banks. Control signals BHE and A0 are used to enable outputs of odd and even memory banks respectively. As each memory chip has 8K memory locations, thirteen address lines are required to address each locations, independently. All remaining address lines are used to generate an unique chip select signal. This addressing technique is normally used in large, memory systems.

Address Decoding Techniques in 8086 Microprocessor

2.Linear Decoding :

In small systems, hardware for the decoding logic can be eliminated,by using only required number of addressing lines (not all). Other lines are simply ignored. This technique is referred as Linear Decoding or Partial Decoding. 10.13 shows the addressing of 16K RAM (6264) with linear decoding. Control signals BHE and A0 are used to, enable odd and even memory banks, respectively. The address line A19 is used to select the RAM chips. When A19 is low, chip is selected, otherwise it is disabled. The status of A14 to A18 does not affect the chip selection logic. This gives you multiple addresses (shadow addresses). This technique reduces the cost of Address Decoding Techniques in 8086 Microprocessor circuit, but it has drawback of multiple addresses.

Address Decoding Techniques in 8086 Microprocessor

3.Block Decoding :

In a microcomputer system the memory array is often consists of several blocks of memory chips. Each block of memory requires decoding circuit. To avoid separate decoding for each memory block special decoder IC is used to generate chip select signal for each block. Fig. 10.14 shows the block Address Decoding Techniques in 8086 Microprocessor using 74138, 3:8 decoder.

Address Decoding Techniques in 8086 Microprocessor

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